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lt3797 1 3797f for more information www.linear.com/lt3797 typical application features description triple output led driver controller the lt ? 3797 is a triple output dc/dc controller designed to drive three strings of leds. the fixed frequency, current mode architecture results in stable operation over a wide range of supply and output voltages. the lt3797 includes an integrated dc/dc converter to produce a regulated 7.5v supply for the n-channel mosfet gate drivers of the three channels. this high efficiency converter enables the part to operate from a wide input voltage range from 2.5v to 40v. the lt3797 is designed so that each converter can use the most suitable configuration to drive its led load, whether step-up, step-down or a combination. two key features enable this flexibility: first the lt3797 can sense output current at the high side of the led string; and second, the voltage feedback pin, fbh, is referred to the isp current sensing input. the ctrl inputs provide output current analog dimming capability. the tg drivers level shift the pwm signals to drive the gates of external led-disconnect p-channel mosfets, allowing high pwm dimming range, and providing led overcurrent protection and short-circuit protected boost capability. triple boost led driver applications n three independent led driver channels n wide input voltage range: 2.5v to 40v n v in transient ride-through up to 60v n rail-to-rail led current sense: 0v to 100v n 3000:1 pwm dimming n tg drivers for pmos led disconnection n operates in boost, buck mode, buck-boost mode, sepic or flyback topology n open-led protection n short-circuit protected boost capable n fault flags for independent channels n programmable v in undervoltage and overvoltage lockout n adjustable switching frequency: 100khz to 1mhz n synchronizeable to an external clock n ctrl pins provide analog dimming n programmable soft-start n 52-lead qfn package n automotive and industrial lighting n rgb lighting n billboards and large displays l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7199560, 7321203, 7746300. ovlo ctrl1-3 487k 75k v ref v in rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 48.7k300khz 0.1f 47h pwm1-3 f lt 1-3 ss1-3 4.7f 3 1f 0.1f 10f 3797 ta01 10nf 4.7k 1m 20.5k 47.5k v in 2.5v to 40v (60v transient, 41v internal ovlo protection) 49.9k isp1-3 en/uvlo v in isn1-3 gate1 sensep1 sensen1 tg1 8m 0.1f 4.7f100v 2 10h gate2 sensep2 sensen2 tg2 lt3797 8m 10h gate3 sensep3 sensen3 tg3 8m 1a50v 1a50v isn3 isp3 10h isn2 isp2 isn1 isp1 250m 4.7f100v 2 250m 4.7f 100v 2 250m 1a50v 0.1f 0.1f downloaded from: http:///
lt3797 2 3797f for more information www.linear.com/lt3797 pin configuration absolute maximum ratings v in , en/uvlo ............................................................ 60v intv cc , sync, ovlo, pwm1, pwm2, pwm3 ............ 8v isn1 ....................................................... isp1-1.5v, 100v isn2 ....................................................... isp2-1.5v, 100v isn3 ....................................................... isp3-1.5v, 100v fbh1 ...................................................... isp1 6v, 100v fbh2 ...................................................... isp2 6v, 100v fbh3 ...................................................... isp3 6v, 100v vc1, vc2, vc3, v ref , ss1, ss2, ss3 .......................... 3v ctrl1, ctrl2, ctrl3, flt 1, flt 2, flt 3................... 12v rt ............................................................................ 1.5v sensep1, sensep2, sensep3, sensen1, sensen2, sensen3, ............................................. 0.3v sw1, sw2, boost, tg1, tg2, tg3, gate1, gate2, gate3 .................................................. (note 2) operating ambient temperature range (note 3) ...................................................... C40 to 125c maximum junction temperature .......................... 125c storage temperature range .................. C65c to 150c (note 1) 16 15 17 19 top view 53 gnd ukg package variation: ukg52(47) 52-lead (7mm 8mm) plastic qfn 20 21 22 23 24 25 26 51 52 50 49 48 47 46 45 44 43 42 41 33 35 36 37 38 40 8 7 6 5 4 3 2 1 flt 1 flt 2 flt 3 pwm1pwm2 pwm3 v ref ctrl1ctrl2 ctrl3 rt sync tg1 vc3 fbh3 isp3isn3 tg3 tg2 isn2 isp2 fbh2 vc2ss2 ovloen/uvlo v in sw1boost sw2 intv cc intv cc gate3sensep3 sensen3 ss3 isn1 isp1 fbh1 vc1ss1 sensen1 sensep1 gate1gate2 sensep2 sensen2 3231 30 28 27 9 10 11 12 14 ja = 28c/w exposed pad (pin 53) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3797eukg#pbf lt3797eukg#trpbf lt3797ukg 52-lead (7mm 8mm) plastic qfn C40c to 125c lt3797iukg#pbf lt3797iukg#trpbf lt3797ukg 52-lead (7mm 8mm) plastic qfn C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
lt3797 3 3797f for more information www.linear.com/lt3797 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 24v; en/uvlo = 24v; ctrl1, ctrl2, ctrl3, pwm1, pwm2, pwm3 = 2v; sensen1, sensen2, sensen3 = 0v, unless otherwise noted. parameter conditions min typ max units v in minimum operation voltage l 2.5 v v in overvoltage lockout rising v in falling hysteresis l 40 41 1 42.5 v v v in shutdown i q en/uvlo = 0v en/uvlo = 1.15v 0.1 1 15 a a v in operating i q (not switching) pwm1, pwm2, pwm3 = 0v, intv cc = 8v 0.5 0.75 ma intv cc operating i q (not switching) pwm1, pwm2, pwm3 = 0v, intv cc = 8v 2.4 3 ma v ref voltage 0a i vref 450a l 1.955 2.00 2.035 v v ref line regulation 2.5v v in 40v 0.001 %/v sensep1-sensen1, sensep2-sensen2, sensep2-sensen2 current limit threshold l 100 110 120 mv sensep1, sensep2, sensep3 input bias current current out of pin, sensep1, sensep2, sensep3 = 0v 55 a sensen1, sensen2, sensen3 input bias current current out of pin 210 a integrated intv cc power supply intv cc regulation voltage l 7.15 7.5 7.75 v intv cc undervoltage lockout threshold falling intv cc hysteresis 5.15 5.25 0.4 5.4 v v intv cc line regulation (v intvcc /v in ) 2.5v < v in < 40v 0.001 0.02 % error amplifiersled current sense threshold (isp1-isn1, isp2-isn2, isp3-isn3) isp1, isp2, isp3, fbh1, fbh2, fbh3 = 48v isn1, isn2, isn3, fbh1, fbh2, fbh3 = 0v l l 243 238 250 250 257 272 mv mv 8/10th led current sense threshold (isp1-isn1, isp2-isn2, isp3-isn3) ctrl1, ctrl2, ctrl3=1.1v, isp1, isp2, isp3 = 48v ctrl1, ctrl2, ctrl3=1.1v , isn1, isn2, isn3 = 0v l l 194.5 192 200 200 203.5 218 mv mv 1/10th led current sense threshold (isp1-isn1, isp2-isn2, isp3-isn3) ctrl1, ctrl2, ctrl3=0.3v, isp1, isp2, isp3 = 48v ctrl1, ctrl2, ctrl3=0.3v , isn1, isn2, isn3 = 0v l l 17 15 25 25 29 34 mv mv ctrl1, ctrl2, ctrl3 range for linear current sense threshold adjustment l 0.2 1.2 v ctrl1, ctrl2, ctrl3 input bias current current out of pin, ctrl1, ctrl2, ctrl3 = 0.3v 50 100 na ctrl1, ctrl2, ctrl3 idle mode threshold falling hysteresis 135 150 20 170 mv mv led current sense amplifier input common mode range (isn1, isn2, isn3) l 0 100 v led overcurrent protection threshold (isp1-isn1, isp2-isn2, isp3-isn3) isp1, isp2, isp3, fbh1, fbh2, fbh3 = 48v 1000 mv isp1, isp2, isp3 input bias current (active) isp1, isp2, isp3, isn1, isn2, isn3 = 48v isp1, isp2, isp3, isn1, isn2, isn3 = 0v 630 C100 a na isp1, isp2, isp3 input bias current (idle) pwm1, p wm2, pwm3=0v , isp1, isp2, isp3, isn1, isn2, isn3 = 48v 2 a pwm1, pwm2, pwm3, isp1, isp2, isp3, isn1, isn2, isn3 = 0v C40 na isn1, isn2, isn3 input bias current (active) isp1, isp2, isp3, isn1, isn2, isn3 = 48v isp1, isp2, isp3, isn1, isn2, isn3 = 0v 20 C100 a na downloaded from: http:///
lt3797 4 3797f for more information www.linear.com/lt3797 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 24v; en/uvlo = 24v; ctrl1, ctrl2, ctrl3, pwm1, pwm2, pwm3 = 2v; sensen1, sensen2, sensen3 = 0v, unless otherwise noted. parameter conditions min typ max units isn1, isn2, isn3 input bias current (idle) pwm1, pwm2, pwm3=0v , isp1, isp2, isp3, isn1, isn2, isn3 = 48v 0 1 a pwm1, pwm2, pwm3, isp1, isp2, isp3, isn1, isn2, isn3 = 0v C20 na led current sense amplifier g m isp1-isn1, isp2-isn2, isp3-isn3 = 250mv 250 s fbh1, fbh2, fbh3 regulation voltage fbh(reg) (|isp1-fbh1, isp2-fbh2, isp3-fbh3|) isp1, isp2, isp3, isn1, isn2, isn3 = 48v l 1.225 1.250 1.275 v fbh1, fbh2, fbh3 pin input bias current isp1-fbh1, isp2-fbh2, isp3-fbh3 = 1.25v isp1-fbh1, isp2-fbh2, isp3-fbh3 = C1.25v 2 40 2.4 100 3 na a fbh1, fbh2, fbh3 amplifier g m |isp1-fbh1|, |isp2-fbh2|, |isp3-fbh3| = 1.25v 480 s fbh1, fbh2, fbh3 open-led threshold (|isp1-fbh1|, |isp2-fbh2|, |isp3-fbh3|) voltage rising (note 4) fbh(reg) C 0.07 fbh(reg) C 0.05 fbh(reg) C 0.04 v hysteresis 20 mv fbh1, fbh2, fbh3 overvoltage threshold (|isp1-fbh1|, |isp2-fbh2|, |isp3-fbh3|) voltage rising (note 4) fbh(reg) + 0.05 fbh(reg) + 0.06 fbh(reg) + 0.085 v hysteresis 25 mv vc1, vc2, vc3 output impedance 10 m vc1, vc2, vc3 standby input bias current pwm1, p wm2, pwm3 = 0v ctrl1, ctrl2, ctrl3 = 0v C20 C20 20 20 na na vc1, vc2, vc3 current mode gain Cv vc /v sense 4 v/v vc1, vc2, vc3 source current isp1, isp2, isp3, isn1, isn2, isn3, fbh1, fbh2, fbh3 = 48v, current out of pin 10.5 a vc1, vc2, vc3 sink current isp1, isp2, isp3, fbh1, fbh2, fbh3 = 48v, isn1, isn2, isn3 = 47.7v 12 a isp1, isp2, isp3, isn1, isn2, isn3 = 48v, fbh1, fbh2, fbh3 = 46.7v 32 a oscillator switching frequency r t = 140k r t = 34.0k r t = 10.7k l 95 375 950 100 400 1000 107 425 1050 khz khz khz rt v oltage 1.05 v gate1, gate2, gate3 minimum off-time c gate = 3300pf 200 270 ns gate1, gate2, gate3 minimum on-time c gate = 3300pf 220 300 ns sync input low l 0.4 v sync input high l 1.5 v sync resistance to gnd 200 k logic inputs/outputs en/uvlo threshold voltage falling l 1.180 1.220 1.250 v en/uvlo rising hysteresis 20 mv en/uvlo input low voltage i vin drops below 1a 0.4 v en/uvlo pin bias current low en/uvlo = 1.15v l 1.5 2 2.6 a en/uvlo pin bias current high en/uvlo = 1.33v 40 100 na ovlo pin input bias current 20 100 na ovlo threshold voltage rising hysteresis l 1.225 1.250 125 1.275 v mv downloaded from: http:///
lt3797 5 3797f for more information www.linear.com/lt3797 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 24v; en/uvlo = 24v; ctrl1, ctrl2, ctrl3, pwm1, pwm2, pwm3 = 2v; sensen1, sensen2, sensen3 = 0v, unless otherwise noted. parameter conditions min typ max units pwm1, pwm2, pwm3 input high voltage l 1.1 1.4 v pwm1, pwm2, pwm3 input low voltage l 0.6 0.9 v pwm1, pwm2, pwm3 resistance to gnd 200 k f lt 1, f lt 2, f lt 3 output low i f lt =1ma 300 mv ss1, ss2, ss3 sourcing current ss1, ss2, ss3 = 1v, current out of pin 28 a ss1, ss2, ss3 sinking current ss1, ss2, ss3 = 1v, ovlo =1.3v 2.8 a ss1, ss2, ss3 soft-start reset threshold falling, measured on ss1, ss2, ss3 hysteresis 160 30 mv mv ss1, ss2, ss3 fault reset threshold measured on ss1, ss2, ss3 1.7 v nmos gate drivers gate1, ga te2, gate3 output rise time (t r ) c gate = 3300pf (note 5) 25 ns gate1, gate2, gate3 output fall time (t f ) c gate = 3300pf (note 5) 25 ns gate output low (v ol ) 0.1 v gate output high (v oh ) intv cc C 0.05 v pmos gate drivers tg1, tg2, tg3 turn-on time c tg = 1000pf (note 6) 200 ns tg1, tg2, tg3 turn-off time c tg = 1000pf (note 6) 70 ns pmos gate on voltage (isp1-tg1, isp2-tg2, isp3-tg3) 6.5 v pmos gate off voltage (isp1-tg1, isp2-tg2, isp3-tg3) 0.3 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: do not apply a positive or negative voltage or current source to sw1, sw2, gate1, gate2, gate3, tg1, tg2, tg3 pins, otherwise permanent damage may occur. note 3: the lt3797e is guaranteed to meet performance specifications from the 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3797i is guaranteed over the full C40c to 125c operating junction temperature range. note 4: fbh(reg) denotes the regulation voltage (|isp-fbh|) of the corresponding fbh pin.note 5: rise and fall times are measured at 10% and 90% levels. note 6: gate turn-on/turn-off time is measured from 50% level of pwm voltage to 90% level of gate on/off voltage. downloaded from: http:///
lt3797 6 3797f for more information www.linear.com/lt3797 typical performance characteristics v isp-isn threshold at ctrl = 0.7v vs temperature isp/isn input bias current vs v isp , v isn v isp-isn threshold vs v |isp-fbh| |isp-fbh| regulation voltage vs temperature, v isp v ref voltage vs temperature v ref voltage vs v in v isp-isn threshold vs v ctrl v isp-isn threshold vs v isp v isp-isn full-scale threshold vs temperature t a = 25c unless otherwise noted. temperature (c) C50 v(isp-isn) threshold (mv) 253 25 3797 g03 250 248 C25 0 50 247246 254252 251 249 75 100 125 v isp = 48v v isp , v isn (v) 0 isp, isn bias current (a) 300 400 500 60 isp isn 100 3797 g05 200 100 0 20 40 80 600 700 800 v |isp-fbh| (v) 1.1 0 v (isp-isn) threshold (mv) 50 100 150 200 250 300 v isp = 48v 1.15 1.2 1.25 1.3 3797 g06 temperature (c) C50 1.240 v |isp-fbh| (v) 1.245 1.250 1.255 1.260 C25 0 25 50 3797 g07 75 100 125 v isp = 4.5v v isp = 100v v isp = 48v temperature (c) C50 v ref (v) 2.03 25 3797 g08 2.00 1.98 C25 0 50 1.971.96 2.042.02 2.01 1.99 75 100 125 i ref = 0a i ref = 450a v in (v) 0 1.990 v ref (v) 1.995 2.000 2.005 2.010 5 10 15 20 3797 g09 25 30 35 40 v isp (v) 0 v (isp-isn) threshold (mv) 249 250 251 60 100 3797 g02 248 247 246 20 40 80 252 253 254 v ctrl (v) 0 0 v isp-isn threshold (mv) 50 100 150 200 0.4 0.8 1.2 1.6 3797 g01 250 300 0.2 0.6 1.0 1.4 temperature (c) C50 v isp-isn threshold (mv) 201 202 203 25 75 3797 f04 200 199 C25 0 50 100 125 198 197 downloaded from: http:///
lt3797 7 3797f for more information www.linear.com/lt3797 typical performance characteristics t a = 25c unless otherwise noted. ovlo threshold vs temperature en/uvlo falling/rising threshold vs temperature en/uvlo hysteresis current vs temperature en/uvlo current vs voltage sense current limit threshold vs temperature sense current limit threshold vs duty cycle r t vs switching frequency switching frequency vs temperature v in , intv cc quiescent current vs v in switching frequency (khz) 100 r t (k) 300 3797 g10 10 100 200 1000 900 800 700 600 500 400 0 temperature (c) C50 switching frequency (khz) 415 25 3797 g11 400 390 C25 0 50 385380 420410 405 395 75 100 125 v in (v) 0 0 v in , intv cc quiescent current (ma) 1.00.5 1.5 2.0 2.5 5 10 15 20 3797 g12 25 30 35 40 pwm = 0v i intvcc i vin temperature (c) C50 1.09 ovlo (v) 1.11 1.15 1.17 1.19 50 1.27 3797 g13 1.13 0 C25 75 100 25 125 1.21 1.23 1.25 ovlo rising threshold ovlo falling threshold temperature (c) C50 en/uvlo (v) 1.23 1.24 1.25 25 75 3797 g14 1.22 1.21 C25 0 50 100 125 1.20 1.19 en/uvlo rising threshold en/uvlo falling threshold temperature (c) C50 1.6 en/uvlo hysteresis current (a) 1.8 2.0 2.2 2.4 C25 0 25 50 3797 g15 75 100 125 en/uvlo voltage (v) 0.122 C0.5 en/uvlo current (a) 1.5 2.0 2.5 1.22 12.2 3797 g16 1.00.5 0 temperature (c) C50 105 v (sensep-sensen) (mv) 107 108 109 115112 0 50 75 100 3797 g17 106 113 114111 110 C25 25 125 duty cycle 0 v (sensep-sensen) (mv) 105 110 80 3797 g18 100 95 20 40 60 100 115 downloaded from: http:///
lt3797 8 3797f for more information www.linear.com/lt3797 pin functions typical performance characteristics t a = 25c unless otherwise noted. intv cc vs temperature, v in intv cc current limit vs v in , f sw top gate (pmos) rise/fall time vs capacitance f lt 1, f lt 2, f lt 3 (pins 1, 2, 3): open-collector pull-downs on f lt pins report the fault conditions: 1. v in > 41v (typical) 2. overtemperature (t j > 165c) 3. intv cc < 5.2v (typical) 4. ovlo > 1.25v (typical) 5. led overcurrent 6. open led 7. output overvoltage pwm1, pwm2, pwm3 (pins 4, 5, 6): pulse width modu - lated input pins. signal low causes the respective converter to go into idle mode which means it stops switching, the tg pin transitions high, the quiescent currents are reduced, and the vc becomes high impedance. if not used, connect to the ref pin. v ref (pin 7): reference output pin. can supply up to 450a. this pin drives a resistor divider for the ctrl1, ctrl2, ctrl3 pins, either for analog dimming or for temperature limit/compensation of led loads. the normal output voltage is 2v. ctrl1, ctrl2, ctrl3 (pins 8, 9, 10): current sense threshold adjustment pins. sets voltage across external sense resistor between isp and isn pins of the respective converter: v isp-isn = 0v, when v ctrl < 0.2v v isp-isn = (v ctrl C 0.2v)/4, when 0.2v < v ctrl < 1.2v v isp-isn = 250mv, when v ctrl >1.2v connect ctrl pins to v ref for the 250mv default threshold. when v ctrl < 150mv (typical), the respective converter goes into idle mode, which is the same as pwm pin being pulled low. do not leave these pins open. rt (pin 11): switching frequency adjustment pin. set the frequency using a resistor to gnd. do not leave the rt pin open. sync (pin 12): the sync pin is used to synchronize the internal oscillator to an external logic-level signal. the r t resistor should be chosen to program an internal switching frequency 20% slower than the sync pulse frequency. gate turn-on occurs at a 0.2s (typical) delay after the rising edge of sync. tie sync to gnd if not used. temperature (c) C50 7.450 intv cc (v) 7.475 7.500 7.525 7.550 C25 0 25 50 3797 g19 75 100 125 v in = 2.5v v in = 40v v in = 24v capacitance (nf) 0 time (ns) 400 800 1200 200 600 1000 2 4 6 8 3797 g21 10 1 0 3 5 7 9 rise time fall time v in (v) 0 intv cc current limit i intvcc_lmt (ma) 150 200 250 3739 g20 100 50 125 175 225 75 25 0 3 6 9 12 15 18 21 24 27 30 33 36 39 l = 47h 100khz 200khz 300khz 400khz 500khz 600khz >900khz 700khz 800khz downloaded from: http:///
lt3797 9 3797f for more information www.linear.com/lt3797 pin functions tg1, tg2, tg3 (pins 14, 33, 35): top gate driver out - put pins for driving led loads disconnect p-channel mosfets (pmoss). one for each channel. an inverted p wm signal drives an external pmos gate of the respec - tive converter between v isp and (v isp C 6.5v). leave tg pins unconnected if not used.isn1, isn2, isn3 (pins 15, 32, 36): connection points for the negative terminals of the current feedback resistors. isp1, isp2, isp3 (pins 16, 31, 37): connection points for the positive terminals of the current feedback resis - tors. also serves as positive rails for tg pin drivers and the reference point for fbh. fbh1, fbh2, fbh3 (pins 17, 30, 38): voltage loop feed - back pins. the output feedback voltage v fb is measured between the isp pin and the fbh pin (absolute value): v fb = |isp C fbh|. the fbh pin is intended for constant- voltage regulation or for led protection/open-led detec - tion for each channel. in an open-led event, the internal amplifier with output vc regulates v fb to 1.25v (typical) through the respective converter. if v fb is above the over - voltage threshold (typical 1.3v), the tg pin of the same channel is driven high to disconnect the external pmos to protect the leds from an overvoltage event. either open- led or overvoltage event signals a fault condition. do not leave the fbh pins open. it requires isp to be no less than 4.5v to maintain an accurate v fb1 voltage sense. if isp falls below 4.5v, the voltage regulation is deactivated and the isp-isn current regulation dominates regardless of the |isp-fbh| value. if not used, connect the fbh pin to the isp pin of the same channel. vc1, vc2, vc3 (pins 19, 28, 40): error amplifier com - pensation pins. connect a series rc from each vc pin to gnd. in each channel, the vc pin is high impedance when the pwm pin is low, or the ctrl pin is below 150mv. this feature allows the vc pin to store the demand current state variable for the next pwm or ctrl high transition. ss1, ss2, ss3 (pins 20, 27, 41): soft-start pins. each ss pin modulates compensation vc pin voltage of the respective channel. each of the soft-start intervals is set with an external capacitor. sensen1, sensen2, sensen3 (pins 21, 26, 42): the negative current sense inputs for the control loops. kelvin connect the sensen pin to the negative terminal of the switch current sense resistor (which connects to the gnd plane) of the respective converter. connect sensen pin to sensep pin of the same channel with a 0.1f ceramic capacitor placed close to pins. sensep1, sensep2, sensep3 (pins 22, 25, 43): the positive current sense inputs for the control loops. kelvin connect the sensep pin to the positive terminal of the switch current sense resistor in the source of the external n-channel mosfet (nmos) switch of the respec - tive converter. connect sensep pin to sensen pin of the same channel with a 0.1 f ceramic capacitor placed close to pins.ga te1, gate2, gate3 (pins 23, 24, 44): n-channel mosfet gate driver outputs. switch between intv cc and gnd. driven to gnd during shutdown, fault or idle states. intv cc (pins 45, 46): intv cc pins are the integrated power supply output voltage nodes that provide supply for control circuits and nmos gate drivers. the two intv cc pins are internally shorted. must be bypassed with a 10f ceramic capacitor placed close to the pins. sw2 (pin 47): integrated power supply switch node. connect this pin to one side of the integrated power sup - ply inductor. boost (pin 48): connect this pin to sw1 pin through a 0.1 f ceramic capacitor. sw1 (pin 49): integrated power supply switch node. connect this pin to the other side of the integrated power supply inductor, and to the boost pin with a 0.1f ce - ramic capacitor. v in (pin 50): input supply pin. if v in is over 41v (typical), the integrated intv cc power supply is turned off. all three channels are also turned off (including pulling the gate pins to gnd and tg pins to isp) and the soft-starts are reset. must be locally bypassed with low esr capacitors placed close to the pin. downloaded from: http:///
lt3797 10 3797f for more information www.linear.com/lt3797 pin functions en/uvlo (pin 51): enable and undervoltage lockout pin. an accurate 1.22v falling threshold with externally programmable hysteresis detects when power is ok to en - able the integrated intv cc power supply and each channel switching. rising hysteresis is generated by the external resistor divider and an accurate internal 2a pull-down current. above the 1.24v (typical) rising threshold (but below 2.5v), en/uvlo input bias current is sub-a. below the 1.22v (typical) falling threshold, a 2a pull-down cur - rent is enabled so the user can define the hysteresis with the external resistor selection. an undervoltage condition turns off the integrated intv cc power supply and all the three channels and resets the soft-starts. tie to 0.4v, or less, to disable the device and reduce v in quiescent cur - rent below 1a. ovlo (pin 52): overvoltage lockout pin. an accurate 1.25v rising threshold with 125mv hysteresis detects an overvoltage condition. an overvoltage condition turns off all three channels (including pulling the gate pins to gnd and tg pins to isp) and resets the soft-starts. tie ovlo to gnd if not used. gnd (exposed pad pin 53): ground. solder the exposed pad directly to ground plane. downloaded from: http:///
lt3797 11 3797f for more information www.linear.com/lt3797 block diagram a1 v in a2 a3 1.22v 1.25v 2v 5.7v shdn ch1 flt ch2 flt ch3 flt intv cc intv cc uvlo ovlo r4 r3 v ref v in en/uvlo r2 r1 r c c ss is1 2a +C a5 a4 set 1.05v +C +C a11 +C 41vv in v in ovlo +C 51 f lt 3 q1 q2 q3 3 f lt 2 2 f lt 1 1 ss1 ctrl_on 12a at a9 + = a9 C 12a at a8 + = a8 C 150mv 20 ctrl1 8 vc1 19 50 fault protection and report + C + C 52 7 rt r t 165c thermal shutdown ch1 soft-start and fault protection 11 sync shared components replicated for each channel 12 50khz to 1mhz oscillator ramp generator ramp v in 48 boost 23 17 16 15 gate1 m1 22 sensep1 21 sensen1 r sw_sen shdn set c vin1 v in 49 sw1 47 sw2 53 gnd 3797 f01 intv cc 45, 46 integrated power supply c sen c boost l pwr c vcc +C +C a9 + C 1.25v a16 ovfb pwmon ch1 flt ss1 s2 ovi fbh1 r6 r5 v fb1 C + r sw_sen isn1 14 tg1 g4 isp1-6.5v isp1 4 pwm1 c out l1 v in led string v out d1 m2 isp1 a6 a7 + C 1.3v x4 + 0.2v |isp1 C?fbh1| a8 s1 a12 ctrl_on a14 +C a13 v isense1 r o s sr1 set 110mv intv cc 3v 12a 3v 25a 1ma + + C 1.2v 2.5a shdn pwm1 pwmon q4 g1 g2 + C g3 protection c c c vin2 figure 1. lt3797 block diagram working in boost configuration (for simplicity, only channel 1 is shown) downloaded from: http:///
lt3797 12 3797f for more information www.linear.com/lt3797 operation the lt3797 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. it contains three independent switching regulators. operation can be best understood by referring to the block diagram in figure 1. the oscillator, internal power supply etc., are shared among the three converters. the led current control circuitry, gate drivers etc., are replicated for each of the three converters. for simplicity, figure 1 shows the shared circuits and the channel specific circuits for converter 1. the led current regulation can be understood by following the operation of converter 1. the start of each oscillator cycle sets the sr latch sr1 and turns on the external power mosfet switch m1 through gate driver g2 (the three converters share the same oscillator, which means if all the three channels are enabled the gate pins of all the three channels transition high at the same instant). the switch current flows through the external current sensing resistor r sw_sen1 and generates a voltage proportional to the switch current. this current sense voltage (amplified by a14) is added to a stabilizing slope compensation ramp and the resulting sum v isense1 is fed into the negative terminal of the pwm comparator a12. the current in the external inductor l1 increases steadily during the time the switch is on. when v isense1 exceeds the level at the negative input of a12 (vc1), sr1 is reset, turning off the power switch. during the switch-off phase, l1 current decreases. through this repetitive action, the pwm control algorithm establishes a switch duty cycle to regulate a current in the led string. the vc1 voltage is set by the error amplifier a8 and is an amplified version of the difference between the led current sense voltage, measured between isp1 and isn1, and the target difference voltage set by the ctrl1 pin. in this manner, the error amplifier sets the correct switch peak current level to keep the led current in regulation. the lt3797 has a switch current limit function. the switch current sense signal is input to the current limit comparator a13. if the current sense voltage is higher than the sense current limit threshold, v sense(max) (typical 110mv), a13 will reset sr1 and turn off m1 immediately. the lt3797 provides the constant voltage regulation mode to allow the users to accurately program the output regula - tion voltage in an open-led event. in voltage regulation mode, the operation is similar to that described above, except the vc1 voltage is set by a9 and is an amplified version of the difference between the internal reference of 1.25v (typical) and the output feedback voltage, v fb1 , which is measured between isp1 and fbh1 (the absolute value): v fb1 = |isp1-fbh1| the led current sense feedback interacts with the fbh1 voltage feedback so that the sense voltage between isp1 and isn1 does not exceed the threshold set by the ctrl1 pin, and v fb1 does not exceed 1.25v (typical). for accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the ap - propriate loop is dominant. to deactivate the voltage loop entirely, fbh1 can be connected to isp1. to deactivate the led current loop entirely, the isp1 and isn1 should be tied together and the ctrl1 input tied to v ref . it requires isp to be no less than 4.5v to maintain an accurate v fb1 voltage sense. if isp falls below 4.5v, the voltage regulation is deactivated and the current regulation dominates regardless of the |isp1-fbh1| value. two led driver specific functions featured on the lt3797 are controlled by the voltage feedback pin fbh1. first, when the v fb1 exceeds a voltage 50mv lower (C4%) than the v fb1 regulation voltage (typical 1.25v), it indicates that the led may be disconnected and the constant-voltage feedback loop is taking control of the switching regulator. f lt 1 is pulled low to report a fault condition. second, when v fb1 exceeds the v fb1 regulation voltage by 60mv (5% typical), it indicates an output overvoltage fault. in this condition, tg1 pin is driven high by g3 and g4, turning off the external pmos m2. this action disconnects the led load from the power path, preventing excessive current from damaging the leds. f lt 1 is kept low to report the fault condition. downloaded from: http:///
lt3797 13 3797f for more information www.linear.com/lt3797 applications information switching frequency and synchronization the rt frequency adjust pin allows the user to program the switching frequency (f sw ) from 100khz to 1mhz to optimize efficiency/performance or external component size. higher frequency operation yields smaller compo - nent size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. lower frequency operation gives higher efficiency, achieves higher maximum duty cycle or lower minimum duty cycle at the cost of larger external compo - nent size. an external resistor from the rt pin to gnd is requireddo not leave this pin open. for an appropriate r t resistor value see table 1. table 1. switching frequency (f sw ) vs r t value f sw (khz) r t (k) f sw (khz) r t (k) 100 154 600 22.6 150 102 650 20.5 200 75.0 700 17.4 250 59.0 750 19.1 300 48.7 800 16.2 350 41.2 850 15.0 400 35.7 900 14.0 450 31.6 950 13.3 500 28.0 1000 12.4 550 24.9 the operating frequency of the lt3797 can be synchronized to an external clock source. by providing a digital clock signal into the sync pin, the lt3797 will operate at the sync clock frequency. if this feature is used, an r t resistor should be chosen to program a switching frequency 20% slower than sync pulse frequency. tie the sync pin to gnd if this feature is not used. duty cycle considerations switching duty cycle is a key variable defining converter operation, therefore, its limits must be considered when programming the switching frequency for a particular ap - plication. the minimum duty cycle of the switch is limited by the fixed minimum on-time (200ns maximum) and the switching frequency (f sw ). the maximum duty cycle of the switch is limited by the fixed minimum off-time (200ns maximum) and f sw . the following equations express the minimum/maximum duty cycle: minimum duty cycle = 200ns ? f sw maximum duty cycle = 1 C 200ns ? f sw besides the limitation by the minimum off-time, it is also recommended to choose the maximum duty cycle below 95%. pwm dimming control the led of each channel can be dimmed with pulse width modulation using the pwm pin. figure 1 shows the chan - nel?1 driver. if the pwm1 pin is pulled high, m2 is turned on by g3 and g4. converter 1 operates normally. g4 limits isp1-tg1 to 6.5v to protect the gate of m2. if the p wm1 pin is pulled low, the external nmos m1 is turned off through g1 etc, and converter 1 stops operating. m2 is turned off through the tg1 pin, disconnecting led1 and stopping current drawing from output capacitor, c out . the vc1 pin is also disconnected from the internal circuitry through s1. the capacitors c c and c out store the state of the led string current until pwm1 is pulled up again. this leads to a highly linear relationship between pwm duty cycle and output light (brightness), and allows for a large and accurate dimming range. the pwm dimming downloaded from: http:///
lt3797 14 3797f for more information www.linear.com/lt3797 applications information range can be maximized by using the pwm pin for dim - ming and the ctrl pin for linearly adjusting the current sense threshold. in the applications where the operation frequency of the lt3797 is synchronized to an external clock sour ce applied to the sync pin, it is recommended to synchronize the rising edge of the external clock and the rising edge of the pwm signal of each of the three channels, as shown in figure 2. besides analog dimming, the ctrl pin can also be used for pwm dimming control. refer to figure 1 for channel?1 operation. if ctrl1 falls below 150mv, the ctrl_on sig - nal is pulled low by comparator a11. since ctrl_on is connected to one of g3 s inputs, channel 1 has the same operation as p wm1 being pulled low (such as disconnect - ing led1 from c out and disconnecting c c from vc1, etc). therefore, the ctrl pin can be used for a combination of linear and pwm dimming control if it is connected to a pwm signal whose low level is below 150mv and high level is between 0.2v and 1.3v. connect the pwm pins to the v ref pin if the ctrl pins are used for pwm dimming or no pwm dimming is used. do not use a low v th pmos for led disconnection. the pmos with a minimum v th of C1v to C2v is recommended. in the applications where accurate pwm dimming is not required, the p-channel mosfets can be omitted to reduce cost. in these conditions, the tg pins should be left open. programming the led currentthe led current of each channel is programmed by con - necting an external sense resistor, r led_sen , in series with the led load, and setting the voltage regulation threshold across r led_sen using ctrl input. the isp and isn sense node traces should run parallel to each other to a kelvin connection on the positive and negative terminals of r led_sen . typically, sensing of the current should be done at the top of the led string. if this option is not available, then the current may be sensed at the bottom of the led string. the ctrl pin should be tied to a voltage higher than 1.3v to get the full-scale 250mv (typical) threshold across the sense resistor. the ctrl pin can also be used to dim the led current from full scale to zero, although relative accuracy decreases with the decreasing voltage sense threshold. when the ctrl pin voltage is less than 1.1v and higher than 0.2v, the led current is: i led = v ctrl C 200mv r led _ sen ? 4 when the ctrl pin voltage is between 1.1v and 1.3v the led current varies with ctrl, but departs from the equation above by an increasing amount as ctrl voltage increases. ultimately, above ctrl = 1.3v the led current no longer varies with ctrl. the typical (isp-isn) threshold vs ctrl voltage when ctrl is close to 1.2v is listed in table 2. table 2. (isp-isn) threshold vs ctrl when ctrl is close to 1.2v v crtl (v) (isp-isn) threshold (mv) 1.1 225 1.15 236 1.2 244.5 1.25 248.5 1.3 250 sync pin input signal pwm pin input signal 3797 f02 figure 2. synchronize the sync pin input signal and the pwm pin input signal downloaded from: http:///
lt3797 15 3797f for more information www.linear.com/lt3797 applications information when ctrl is higher than 1.3v, the led current is regu - lated to: i led = 250mv r led _ sen the led current is regulated to 0a when ctrl is lower than 200mv (typical). the ctrl pin should not be left open (tie to v ref if not used). the ctrl pin can also be used in conjunction with a thermistor to provide overtemperature protection for the led load, or with a resistor divider to v in to reduce output power and limit peak switching current when v in is low. the presence of a time varying differential voltage signal (ripple) across isp and isn at the switching frequency is expected. the amplitude of this signal is increased by high led load current, low switching frequency and/ or a smaller value output filter capacitor. some level of ripple signal is acceptable: the compensation capacitor on the vc pin filters the signal so the average difference between isp and isn is regulated to the user-programmed value. ripple voltage amplitude (peak-to-peak) in excess of 50mv should not cause misoperation, but may lead to noticeable offset between the average value and the user-programmed value. programming output regulation voltage for the open-led eventthe output voltage of each channel in the open-led event can be programmed by selecting two external sense resistors. figure 3 shows the sense resistor connection of channel 1. in the open-led event, v fb1 is regulated to 1.25v, therefore the output regulation voltage can be set according to the following equation: v out = 1.25v ? r5 + r6 r5 since the output voltage is directly measured between isp1 and led1 C , the figure 3 approach works well for the converter topologies where led1 C is connected to gnd (such as boost, sepic, flyback), as well as the topologies where led1 C is connected to an inductor (such as buck mode, buck-boost mode led drivers). typically, the current sense resistor r led_sen1 and dis - connect pmos m2 are connected to the top of the led string (led1 + ), as shown in figure 3. if this option is not available (for example some multi-string led modules are built with a common anode configuration), then the current may be sensed at the bottom of the led string as shown in figure?4. in this configuration, the fbh pin draws 2a (typical) current. therefore, the output regula - tion voltage in the open-led event can be set according to the following equation: v out = 1.25v ? r5 + r6 r5 + 2a ?r6 under normal operating conditions, the led current regulation loop is dominant. therefore, the output regu - lation voltage (v out ) in the open-led event should be programmed so that v fb1 (v fb1 = |isp1-fbh1|) should never exceed 1.1v when led1 is connected. the only way for v fb1 to be within 50mv of the regulation voltage (1.25v) is for an open-led event to occur. downloaded from: http:///
lt3797 16 3797f for more information www.linear.com/lt3797 applications information programming enable and undervoltage lockout with the en/uvlo pin en/uvlo pin controls whether the lt3797 is enabled or is in shutdown state. as shown in figure 1, a 1.22v reference, a comparator, a1, and a controllable current source, is1, allow the user to accurately program the supply voltage at which the ic turns on and off. the falling value can be accurately set by the resistor divider r1 and r2. when en/uvlo is above 0.4v and below the 1.22v threshold, the small pull-down current source, is1 (typical 2a), is active. the purpose of this current is to allow the user to program the rising hysteresis. the falling threshold voltage and rising threshold voltage can be calculated by the following equations: v in(falling) = 1.22v ? r1 + r2 r2 v in(rising) = v in(falling) + 2a ?r 1 for applications where the en/uvlo pin is to be used only as a logic input, the en/uvlo pin can be connected directly to the input voltage, v in , for always on operation. programming overvoltage lockout threshold with the ovlo pin the l t3797 provides an ovlo pin that allows user -pro - grammable overvoltage lockout. a 1.25v (typical) rising threshold with 125mv hysteresis detects the over voltage condition. the ovlo pin can be used to monitor v in or other voltages against overvoltage conditions. figure 1 shows ovlo connecting to v in through a volt - age divider to protect against v in overvoltage. the rising threshold voltage and falling threshold voltage can be calculated by the following equations: v ov(rising) = 1.25v ? r3 + r4 r4 v ov(falling) = 1.125v ? r3 + r4 r4 an overvoltage condition turns off all three channels (including pulling the gate pins to gnd and tg pins to isp) and resets the soft-starts. figure 3. output voltage sense resistor connection r5 r6 r led_sen1 led1 + m2 led1 C led1 +C +C v fb1 v out c out1 isp1 fbh1 isn1 tg1 3797 f03 isn1tg1 isn1 tg1 lt3797 figure 4. output voltage sense resistor connection when r led_sen1 and m2 are connected to the bottom of the led string r5 r6 2a r led_sen1 led1 + m2 led1 C led1 +C +C v fb1 v out c out1 fbh1 isp1 isn1 tg1 3797 f04 lt3797 downloaded from: http:///
lt3797 17 3797f for more information www.linear.com/lt3797 applications information loop compensationloop compensation determines the stability and transient performance. the lt3797 uses current mode control to regulate the output which simplifies loop compensation. the optimum values depend on the converter topology , the component values and the operating conditions (includ - ing the input voltage, led current switching frequency). to compensate the feedback loop of the lt3797, a series resistor-capacitor network is usually connected from the vc pin to gnd. figure 1 shows the typical vc compensation network. for most applications, the capacitor should be in the range of 2.2nf to 22nf, and the resistor should be in the range of 2k to 25k. a practical approach to design - ing the compensation network is to start with one of the circuits in this data sheet that is similar to your applica - tion, and tune the compensation network to optimize the per formance. stability should then be checked across all operating conditions, including led current, input voltage and temperature. application note 76 is a good reference for loop compensation. soft-start and fault protection the lt3797 has identical soft-start and fault protection functions for each channel. the soft-start feature is de - signed to limit peak switch currents and output voltage (v out ) overshoot during start-up or recovery from a fault condition. figure 4 shows the state diagram of the soft-start and fault protection of channel 1. also refer to figure 1 for channel 1 operation. in soft-start mode, the soft-start capacitor is charged up by the 25a current source. the ss1 pin gradually increases the peak switch current al - lowed in m1 by clamping the vc1 voltage through q4. in this way the ss1 pin allows the output capacitor, c out , voltage to be charged gradually toward its final value while limiting m1 current overshoot. the soft-start interval is set by the soft-start capacitor selection according to the following equation: t ss = 1.2v 25a ? c ss the discharge time of the soft-start capacitor is controlled by a 2.5a current source. therefore, the ss1 pin is also used as an adjustable timer in the fault2 protection modes (see figure?5) to prevent thermal runaway problems on the external components and/or the leds. in some fault condi - tions, the soft-start capacitor is charged and discharged repetitively , referred to as the hiccup mode operation. a typical hiccup mode operation occurs when an l t3797 led driver has an output short-circuit fault. figure 5 shows that if an output short-circuit fault causes lt3797 overcurrent (sensed by isp1-isn1) in the normal operation mode, the lt3797 moves to fault2 protection mode, where tg1 is pulled high, turning off the external pmos and isolating the output. as a result, the overcurrent condition is cleared. when ss1 is discharged below 200mv, the lt3797 moves to soft-start mode, where tg1 is pulled low to turn on the external pmos. if the short-circuit fault still exists, the lt3797 senses an overcurrent fault again and moves to fault2 protection mode: ss1 charged up and a new cycle starts. in this manner, the soft-start capacitor is kept charging and discharging between 200mv and 1.7v until the short-circuit fault is cleared. downloaded from: http:///
lt3797 18 3797f for more information www.linear.com/lt3797 applications information figure 5. state diagram of the soft-start and fault protection of channel 1 integrated intv cc power supply start-up mode ? ss1 pulled low by a 1ma current source ? f lt 1 low ? tg1 high ? gate1 low ? integrated intv cc power supply enabled and intv cc charged up fault1 protection mode ? integrated intv cc power supply off ? f lt 1 low ? tg1 high ? gate1 low soft-start mode ? ss1 charged up by the 25a current source ? f lt 1 high ? tg1 low ? gate1 switching to ramp up output led current en/uvlo > 1.22v (typical) and v in > 2.2v (typical) en/uvlo < 1.22v (typical) or v in < 2.2v (typical) intv cc > 5.7v (typical) and ctrl1 > 0.2v (typical) and pwm1 = high and ss1 < 0.2v and ovlo < 1.25v fault1 = v in > 41v (typical) or over temperature (t j > 165c) notes: condition1 = fault2 cleared and ctrl1 > 0.2v (typical) and pwm1 = high and ss1 < 0.2v fault2 = v in > 41v (typical) or over temperature (t j > 165c) or intv cc < 5.2v (typical) or ovlo > 1.25v or output over current ss1 > 1.7v (typical) normal operation mode ? normal operation ss1 > 1.7v (typical) shutdown mode ? integrated intv cc power supply off ? gate1 low ? tg1 high ? i q < 1a fault1 fault1 cleared fault2 protection mode: ss1 discharged ? ss1 discharged by a 2.5a current source ? f lt 1 low ? tg1 high ? gate1 low fault2 fault2 protection mode: ss1 charged up ? ss1 charged up by the 25a current source ? f lt 1 low ? tg1 high ? gate1 low fault2 condition1 3797 f05 downloaded from: http:///
lt3797 19 3797f for more information www.linear.com/lt3797 figure 6. a typical inductor waveform applications information the lt3797 fault protection can be configured as the latch- off mode by connecting a 470k resistor between the ss pin and v ref pin. the fault2 conditions (see figure 4) cause the lt3797 latch off. the lt3797 does not retry a soft-start even if the fault condition is cleared, since the ss pin is not able to fall below 0.2v by the 2.5a pull-down current to reset the latch, due to the pulling up of the 470k resistor. the latch-off can only be cleared by toggling the en/uvlo pin low to high. the open-led fault and the output overvoltage fault are not included in fault2 in figure 5. these two faults do not affect the soft-start status. the open-led fault in channel?1 causes f lt 1 low. the output overvoltage fault in channel ?1 causes f lt 1 low and tg1 high to disconnect the led load from power path. application circuit design guideline the lt3797 contains three independent switching regu - lators. the following sections describe the lt3797 led driver design guideline for the key parameters calculation and external components selection. the design guideline applies to each of the switching regulators. switch duty cycle the lt3797 can be configured with different topologies. the boost led driver is used for the applications where the led voltage is higher than the input voltage. the lt3797 can be configured as a buck mode led driver for the ap - plications where the led voltage is lower than the input voltage. the buck-boost mode and the sepic led driver allow for the input voltage to be higher, equal to or lower than the led voltage. the switch duty cycles of different topologies in continuous conduction mode (ccm) are: d boost = v led C v in v led d buck = v led v in d buck-boost = v led v led + v in d sepic = v led v led + v in the maximum duty cycle (d max ) occurs when the converter has the minimum input voltage (v in(min) ). inductor selection figure 6 shows a typical inductor current waveform when the led driver has maximum output current at the minimum input voltage. ? i l and i l_avg(max) denote the inductor ripple current and the maximum average inductor current respectively. ?i l t 3739 f06 i l_avg(max) i l i l(peak) downloaded from: http:///
lt3797 20 3797f for more information www.linear.com/lt3797 applications information the i l_avg(max) of boost, buck mode, and buck-boost mode led drivers in ccm are: i l _ avg(max)_ buck = i led(max) i l _ avg(max)_ boost = i led(max) ? 1 1Cd max i l _ avg(max)_ buck-boost = i led(max) ? 1 1Cd max the primary and secondary maximum average inductor current of the sepic led driver are: i l1_ avg(max)_ sepic = i led(max) ? d max 1Cd max i l2 _ avg(max)_ sepic = i led(max) where i led(max) is the maximum led current. the inductor ripple current ? i l has a direct effect on the choice of the inductor value. choosing smaller values of ? i l requires large inductances and reduces the current loop gain (the converter will approach voltage mode). accepting larger values of ? i l provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses. the inductor ripple percentage of the boost, buck mode, and buck-boost mode led drivers is: ? i l i l(max) for the sepic converter, ? i l of the primary inductor is equal to ? i l of the secondary inductor. the inductor ripple percentage can be calculated as: 2 ? ? i l i l1(max) + i l2(max) the user should choose an appropriate ? i l based on the trade-offs to optimize the led driver performance. it is recommended that the ripple current percentage fall within the range of 20% to 60% at d max . given an operating input voltage range, and having chosen the operating frequency, f, and ripple current ? i l in the inductor, the inductor values of the boost, buck mode, and buck-boost mode led drivers can be determined using the following equations: l buck = v led ? i l ? f ? 1Cd max) ( ) l boost = v in(min) ? i l ? f ?d max l buck-boost = v in(min) ? i l ? f ?d max the primary and secondary inductor values of the sepic led driver are: l1 = l2 = v in(min) ? i l ? f ?d max by making l1 = l2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2l, due to mutual inductance: l = v in(min) 2 ? ? i l ? f ?d max the inductor peak current and rms current in continuous mode operation can be calculated based on i l(max) and ? i l . i l(peak) = i l(max) + 0.5 ? ? i l i l(rms) i l(max) based on the preceding equations, the user should choose the inductors having sufficient saturation and rms cur - rent ratings. downloaded from: http:///
lt3797 21 3797f for more information www.linear.com/lt3797 applications information switch current sense resistors selection the lt3797 measures each channels power n-channel mosfet current by using a sense resistor (see r sw_sen in figure 1) between gnd and the mosfet source. figure 7 shows a typical waveform of the sense voltage (v sw_sense ) across the sense resistor in ccm. the placement of the sense resistor r sw_sen should be close to the source of the mosfet and gnd. the sensep and sensen sense node traces should run parallel to each other to a kelvin con - nection on the positive and negative terminals of r sw_sen . due to the current limit function of the power switch cur - rent control, r sw_sen should be selected to guarantee that the peak current sense voltage v sw_sense(peak) during steady-state normal operation is lower than the sense current limit threshold (100mv minimum). it is recom - mended to give a 20% margin and set v sw_sense(peak) to be 80mv. then, the switch current sense resistor value can be calculated as: r sw _ sen = 80mv i sw(peak) where i sw(peak) is the peak switch current. i sw(peak) of the boost, buck mode and buck-boost mode led driver is: i sw(peak) = i l(peak) i sw(peak) of the sepic led driver is: i sw(peak) = i l1(peak) + i l2(peak) sense voltage ripple verification after the inductor ripple current and the switch current sense resistor value have been selected according to the previous sections, the sense voltage ripple ? v sw_sense (refer to figure 7) of the boost, buck, and buck-boost led drivers can be determined using the following equation: ? v sw_sense = ? i l ? r sw_sen ? v sw_sense of the sepic led driver can be determined using the following equation: ? v sw_sense = 2 ? ? i l ? r sw_sen the lt3797 has internal slope compensation to stabilize the control loop against sub-harmonic oscillation. when the lt3797 operates at a duty cycle greater than 0.66 in ccm, the sense voltage ripple, ? v sw_sense (refer to figure?7), needs to be limited to ensure the internal slope compensation is sufficient to stabilize the control loop. figure 8 shows the maximum ? v sw_sense over the duty cycle. it is recommended to check and ensure ? v sw_sense is below this curve at the highest duty cycle. if ? v sw_sense is above the maximum ? v sw_sense curve at the highest duty cycle, the ? i l needs to be reduced and the parameters in the previous two sections need to be recalculated until the optimized values are obtained. figure 7. the sense voltage across the sense resistor in ccm ?v sw_sense v sw_sense(peak) t v sw_sense d/f 3797 f07 1/f figure 8. the maximum sense voltage ripple vs duty cycle for ccm duty cycle 0.5 max ?v sw_sense (mv) 30 90 100 110 3797 f08 10 70 50 20 80 0 60 40 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 downloaded from: http:///
lt3797 22 3797f for more information www.linear.com/lt3797 applications information power mosfet selection the selection criteria for the power mosfet includes the drain-source breakdown voltage (bv dss ), the threshold voltage (v gs(th) ), the on-resistance (r ds(on) ), the total gate charge (q g ), the maximum drain current (i d(max) ) and the mosfet s thermal resistances (r jc and r ja ), etc. the required power mosfet bv dss rating of different topologies can be estimated using the following equations. add a diode forward voltage, and any additional ringing across its drain-to-source during its off-time. bv dss_boost > v led bv dss_buck > v in(max) bv dss_buck-boost > v in(max) + v led bv dss_sepic > v in(max) + v led the power dissipated by the mosfet in a boost, buck mode, or buck-boost mode led driver is: p fet = i l(max) 2 ? r ds(on) ? d max + 2 ? v sw(peak) ? i l(max) ? c rss ? f/1.5a the power dissipated by the mosfet in a sepic led driver is: p fet = (i l1(max) + i l2(max) ) 2 ? r ds(on) ? d max + 2 ? v sw(peak) ? (i l1(max) + i l2(max) ) ? c rss ? f/1.5a the first terms in the preceding equations represent the conduction losses in the devices, and the second terms, the switching losses. c rss is the reverse transfer capacitance, which is usually specified in the mosfet characteristics. for maximum efficiency, r ds(on) and q g should be minimized. from a known power dissipated in the power mosfet, its junction temperature can be obtained using the following equation: t j = t a + p fet ? ja = t a + p fet ? ( jc + ca ) t j must not exceed the mosfet maximum junction temperature rating. it is recommended to measure the mosfet temperature in steady state to ensure that absolute maximum ratings are not exceeded. schottky rectifier selection the power schottky diode conducts current during the interval when the switch is turned off. in an lt3797 led driver, the schottky diode should have the same voltage rating as the power n-channel mosfet in the same channel. refer to the power mosfet bv dss rating in the previous section for the peak reverse voltage rating selection. if using the pwm feature for dimming, it is important to consider diode leakage, which increases with the temperature, from the output during the pwm low interval. choose a schottky diode with sufficiently low leakage current. the power dissipated by the diode in a boost, buck, or buck-boost converter in ccm is: p d = i l_avg(max) ? v d ? (1 C dmax) where v d is the diode forward voltage drop. the power dissipated by the diode in a sepic converter is: p d = (i l1_avg(max) + i l2_avg(max) ) ? v d ? (1 C d max ) and the diode junction temperature is: t j = t a + p d ? ( jc + ca ) t j must not exceed the diode maximum junction tem - perature rating. downloaded from: http:///
lt3797 23 3797f for more information www.linear.com/lt3797 applications information high side pmos disconnect switch selection a pmos with a minimum v gs(th) of C1v to C2v is rec - ommended for the high side disconnect switch in most lt3797 applications to improve the pwm dimming ratio and protect the led array from excessive heating during fault conditions. the pmos bv dss rating must be higher than the open-led regulation voltage set by the fbh pin. the maximum continuous drain current i d(max) rating should be higher than the maximum led current.input capacitor selection the input capacitor c in supplies the ac ripple current to the power inductor of the converter and must be placed and sized according to the transient current requirements. the switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the required capacitor value. the x5r or x7r type ceramic capacitors are usually good choices since they have small variation with temperature and dc bias. typically, the boost or sepic converter requires a lower value input capacitor than the buck mode or buck-boost mode converter, due to the fact that its inductor is in series with the input, and the input current waveform is continuous. the input capacitor value can be estimated based on the inductor ripple ? i l (refer to inductor selection section), the switching frequency, and the acceptable input voltage ripple ? v in on c in . c in value of the boost and sepic converter can be calculated by: c in = 0.125 ? ? i l ? v in ? f c in value of the buck mode and buck-boost mode led driver can be calculated by: c in = i led ? v led ? v in(min) C v led ( ) v in(min) 2 ? ? v in ? f output capacitor selectionthe output filter capacitors should be sized to attenuate the led current ripple. use of x5r or x7r type ceramic capacitors is recommended. to achieve the same led ripple current, the required filter capacitor is smaller in the buck mode applications than that in the boost, buck-boost mode and sepic applications. this is due to the fact that, in the buck converter, the inductor is in series with the output and the ripple current flowing through the output capacitor is continuous. lower operating frequencies will require proportionately higher capacitor values. the dc coupling capacitor selection for sepic led driver the dc voltage rating of the dc coupling capacitor, c dc , connected between the primary and secondary inductors should be larger than the maximum input voltage: v cdc > v in(max) c dc has nearly a rectangular current waveform in ccm. during the switch off-time, the current through c dc is i vin , while approximately Ci led flows during the on-time. the c dc voltage ripple causes distortions on the primary and secondary inductor current waveforms. the c dc should be sized to limit its voltage ripple. the power loss on the c dc esr reduces the led driver efficiency. therefore, the sufficient low esr ceramic capacitors should be selected. the x5r or x7r ceramic capacitor is recommended for c dc . integrated intv cc power supply the lt3797 includes an internal switch mode dc/dc con - verter to generate a regulated 7.5v intv cc power supply to power the nmos gate drivers of the three channels (i drive ). this intv cc power supply can also be used to drive external circuits (i ext ). this intv cc power supply downloaded from: http:///
lt3797 24 3797f for more information www.linear.com/lt3797 applications information has two major advantages over the traditional internal ldo regulators. it is able to generate 7.5v intv cc voltage from a v in voltage as low as 2.5v, allowing the lt3797 to drive high threshold mosfets in the low v in applications. it is also able to deliver large current from a v in voltage as high as 40v without overheating the package, due to its high efficiency (over 70% at full load). this integrated dc/dc converter requires three external components (c vcc , c boost and l pwr ) for operation, as shown in figure 1. select these three components based on the following guidelines: ? c vcc is a 10f/10v ceramic capacitor used to bypass intv cc to gnd immediately adjacent to the pins. ? c boost is a 0.1f/10v ceramic capacitor connected between the boost pin and the sw1 pin. ? select a 47h inductor with the saturation current rat - ing of 0.6a or greater and rms current rating of 0.4a or greater for l pwr . the intv cc power supply has an output current limit func - tion to protect itself from excessive electrical and thermal stress. figure 9 shows the intv cc output limit (i intvcc_lmt ) vs v in and switching frequency. make sure the sum of the i drive and i ext is always lower than the i intvcc_lmt across the whole v in range of the application circuit: i drive + i ext < i intvcc_lmt where: i drive = (q g_ch1 + q g_ch2 + q g_ch3 ) ? f sw q g_ch1-3 is the total gate charge of the nmos of the three channels at v gs = 0v to 7.5v. v in (v) 0 intv cc current limit i intvcc_lmt (ma) 150 200 250 3739 f09 100 50 125 175 225 75 25 0 3 6 9 12 15 18 21 24 27 30 33 36 39 100khz 200khz 300khz 400khz 500khz 600khz >900khz 700khz 800khz figure 9. intv cc current limit vs v in , f sw board layout the high speed operation of the lt3797 demands careful attention to board layout and component placement. the exposed pad of the package is the only gnd terminal of the ic, and is important for thermal management of the ic. therefore, it is crucial to achieve a good electrical and thermal contact between the exposed pad and the ground planes of the board. for the lt3797 to deliver its full output power, it is imperative that a good thermal path be pro - vided to dissipate the heat generated within the package. it is recommended that multiple vias in the printed circuit board be used to conduct heat away from the ic and into copper planes with as much area as possible. downloaded from: http:///
lt3797 25 3797f for more information www.linear.com/lt3797 applications information r pgnd v in c 16 15 17 19 53 exposed pad gnd 20 21 22 23 24 25 26 51 52 50 49 48 47 46 45 44 43 42 41 33 35 36 37 38 40 c 8 7 6 5 4 3 2 1 3231 30 28 27 9 10 11 12 14 r r c c c r sw_sen1 rt sgnd vc2 vc3 ss3 ss23797 f10 vc1ss1 sensen1 sensep1 sensep2 sensen2 intv cc v in intv cc c c c pgnd sgndsgnd sgnd c r r sw_sen2 r sw_sen3 c c sensep3 sensen3 figure 10. decoupling capacitors and ground separation the compensation networks (vc1-3) and other dc control signals (such as ss1-3, rt, en/uvlo, ovlo and ctrl1-3) should have separate signal ground (sgnd) from the power stage ground (pgnd). connect sgnd and pgnd only at the lt3797 exposed gnd pad (pin 53). do not extensively route high impedance signals such as fbh and vc, as they may pick up switching noise. the decoupling capacitors that connect v in , intv cc , sensep1-3 and sensen1-3 for the lt3797 should be physically close to their pins. the small footprint size (0201 or 0402) ceramic capacitors are recommended for the decoupling capacitor connecting between the sensep1-3 and sensen1-3 pins. figure 10 shows a example of a pcb layout of the decoupling capacitors and ground separation. to reduce electromagnetic interference (emi) and high frequency resonance problems, proper layout of the lt3797 led driver power stage is essential, especially the power paths with high di/dt. figures 11-14 show the simplified power stage circuits of boost, buck mode, buck-boost mode and sepic topologies with the high di/dt loops high - lighted. the high di/dt loops of different topologies should be kept as tight as possible to reduce inductive ringing. figures?15-16 shows the examples of the high di/dt loop layout of the different topologies shown in figures 11-14. downloaded from: http:///
lt3797 26 3797f for more information www.linear.com/lt3797 applications information + C ledstring 3797 f11 c m r pgnd d sw l v in + C led string 3797 f12 c m r pgnd d sw l v in + C led string 3797 f13 c m r pgnd d sw l v in figure 11. the simplified boost led driver power stage with the high di/dt loop highlighted figure 12. the simplified buck mode led driver power stage with the high di/dt loop highlighted figure 13. the simplified buck-boost mode led driver power stage with the high di/dt loop highlighted downloaded from: http:///
lt3797 27 3797f for more information www.linear.com/lt3797 applications information + C ledstring 3797 f14 c1 c2 m r pgnd d sw1 sw2 l1 l2 v in m 3797 f15 d c pgnd r sw m 3797 f16ff d c1 c2 pgnd r sw1 sw2 figure 14. the simplified sepic led driver power stage with the high di/dt loop highlighted figure 15. a layout example of the high di/dt loop of the boost, buck mode, buck-boost mode led drivers figure 16. a layout example of the high di/dt loop of the sepic drivers downloaded from: http:///
lt3797 28 3797f for more information www.linear.com/lt3797 applications information check the stress on the power mosfets by measuring the drain-to-source voltage directly across the terminals of each device (reference the ground of a single scope probe directly to the source pad on the pc board). beware of inductive ringing, which can exceed the maximum specified voltage rating of the mosfet. if this ringing can - not be avoided, and exceeds the maximum rating of the device, either choose a higher voltage device or specify an avalanche rated power mosfet. the lt3797 led driver circuit can be implemented in a 2-layer pcb board. however, a well designed 4-layer or 6-layer pcb board provides extra ground plane shield - ing and larger area of electrical and thermal conduction path, therefore provides better electrical and thermal performance. recommended component manufacturers some of the recommended component manufacturers are listed in table 3. table 3. recommended component manufacturers vendor components web address avx capacitors avx.com bh electronics inductors, transformers bhelectronics.com central semiconductor diodes centralsemi.com coilcraft inductors coilcraft.com coiltronics inductors cooperindustries.com diodes, inc mosfets, diodes diodes.com fairchild mosfets, diodes fairchildsemi.com international rectifier mosfets, diodes irf.com irc sense resistors irctt.com kemet capacitors kemet.com murata inductors, capacitors murata.com nichicon capacitors nichicon.com on semiconductor mosfets, diodes onsemi.com panasonic, industrial capacitors, resistors panasonic.com sumida inductors sumida.com taiyo yuden inductors, capacitors t-yuden.com tdk inductors, capacitors component.tdk.com united chemicon electrolytic capacitors chemi-con.com vishay mosfets, diodes, inductors, capacitors, sense resistors vishay.com wrth-midcom inductors katalog.we-online.de downloaded from: http:///
lt3797 29 3797f for more information www.linear.com/lt3797 typical applications triple boost led driver r ss1-3 ** 470k ovlo ctrl1-3 v ref v ref rt sync sw1 boost intv cc intv cc gnd vc1-3 fbh1-3 sw2 r t 48.7k300khz c ss1-3 0.1f l pwr 47h pwm1-3 f lt 1-3 f lt 1-3 ss1-3 ss1-3 intv cc v ref 100k c in1-3 4.7f 3 c in3 1f c bst 0.1f *d4-6: option for short led protection **r ss1-3 : optional for fault latchoff c vcc 10f 3797 ta02 c c1-3 10nf r c1-3 4.7k r12-r14 1m r9-r1120.5k r747.5k v in 2.5v to 40v (60v transient, 41v internal ovlo protection) r849.9k isp1-3 en/uvlo d1-d3: diodes inc. pds5100 d4-d6: vishay siliconix es1c l1-l3: coiltronics hc9-100-r l pwr : coiltronics sd25-470 m1, m3, m5: infineon bsc123n08ns3-g m2, m4, m6: vishay siliconix si7113dn v in isn1-3 gate1 sensep1 sensen1 tg1 r1 8m r3 8m r5 8m m2 m4 m3 m6 m5 m1 0.1f d1 d4* v led1 + d5* v led2 + d6* v led3 + d2 d3 c out1 4.7f100v 2 c out2 4.7f100v 2 c out3 4.7f100v 2 r6250m l1 10h l2 10h l3 10h gate2 sensep2 sensen2 tg2 lt3797 gate3 sensep3 sensen3 tg3 1a50v isn3 isp3 r4250m isn2 isp2 r2250m isn1 isp1 1a50v 1a50v 487k 75k v in 0.1f 0.1f efficiency and output current vs v in fault (short led) protection without r ss1-3 : hiccup mode fault (short led) protection without r ss1-3 : latchoff mode 500:1 pwm dimming at 120hz v in (v) 0 50 efficiency (%) output current (a) 55 65 70 75 100 85 10 20 25 3797 ta02b 60 90 95 80 0 0.2 0.6 0.8 1.0 2.01.4 0.4 1.6 1.8 1.2 5 15 30 35 40 pwm1-3 = 2v efficiency output current pwm 5v/div i l 5a/div i led 1a/div 5s/div v in = 12v 3797 ta02c ss1-3 2v/div i m2,4,6 10a/div v led1-3 + 50v/div f lt 1-3 10v/div 50ms/div 3797 ta02d ss1-3 2v/div i m2,4,6 10a/div v led1-3 + 100v/div f lt 1-3 10v/div 50ms/div 3797 ta02e downloaded from: http:///
lt3797 30 3797f for more information www.linear.com/lt3797 typical applications 3v to 5v input, triple boost led driver ovlo ctrl1-3 v ref rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 r t 12.4k1mhz 0.1f l pwr 47h pwm1-3 f lt 1-3 ss1-3 c in1-3 47f 3 c in4 10f 0.1f 10f 3797 ta03 10nf 4.7k 499k 80.6k v in 3v to 5v 30.1k 22.6k 59k isp1-3 en/uvlo d1-d3: visahy siliconix 30bq015l1-l3: visahy siliconix ihlp-2525cz-01 l pwr : coiltronics sd25-470 m1, m3, m5: infineon bsc050n03lsg m2, m4, m6: vishay siliconix si7619dn v in isn1-3 gate1 sensep1 sensen1 tg1 r1 0.01 r3 0.01 r5 0.01 m2 m4 m3 m6 m5 m1 d1 d2 d3 c out1 22f c out2 22f c out3 22f l1 1.0h l2 1.0h l3 1.0h 2a8v 2a8v 2a8v gate2 sensep2 sensen2 tg2 lt3797 isp3isn3 0.125 gate3 sensep3 sensen3 tg3 isp2isn2 0.125 isp1isn1 0.125 0.1f 0.1f 0.1f 1000:1 pwm dimming at 120hz efficiency vs v in v in (v) 3 70 efficiency (%) 75 80 85 90 95 100 3.5 4 4.5 5 3797 ta03b ctrl1-3 = 2vpwm1-3 = 2v pwm 5v/div i l 5a/div i led 2a/div 2s/div 3797 ta03c downloaded from: http:///
lt3797 31 3797f for more information www.linear.com/lt3797 typical applications triple buck mode led driver 1000:1 pwm dimming at 120hz efficiency vs pv in ovloovlo ctrl1-3 v ref rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 35.7k400khz 0.1f l pwr 47h pwm1-3 f lt 1-3 ss1-3 c in1-3 4.7f 3 c in4 4.7f 0.1f 10f 3797 ta04 10nf 10k 200k 1m 14.3k 0.25 12v 43.2k pv in 24v to 80v isp1-3 en/uvlo d1-d3: vishay siliconix vs-10bq100 l1-l3: wrth 74437349330 l pwr : coiltronics sd25-470 m1, m3, m5: vishay siliconix si4100dy m2, m4, m6: vishay siliconix si7113dn v in isn1-3 tg1-3 gate1 sensep1 sensen1 0.068 0.068 1a20v 1a 20v 348k 20k fbh1 c out1 4.7f c out2 4.7f m2 m4 m3 tg1 tg2 led1 + led1 + m1 d1 l1 33h l233h 1a20v gate2 sensep2 sensen2 lt3797 gate3 sensep3 sensen3 isn2 isp2 ovlo 0.25 0.068 348k 20k fbh1 c out3 4.7f m6m5 tg3 isn3 led1 + d3 0.1f l3 22h isp3 348k 20k fbh2 d2 0.25 isn1 isp1 0.1f 0.1f pv in (v) 20 70 efficiency (%) 75 80 85 90 100 30 40 50 60 3797 ta04b 70 80 95 ctrl1-3 = 2vpwm1-3 = 2v pwm 5v/div i l1 1a/div i led 1a/div 2s/div v in = 48v 3797 ta04c downloaded from: http:///
lt3797 32 3797f for more information www.linear.com/lt3797 typical applications triple buck mode led driver for common anode leds 1000:1 pwm dimming at 120hz efficiency vs v in ctrl1-3 ovlo 8.45k 10k r t1 ntc 10k rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 35.7k400khz 0.1f l pwr 47h pwm1-3 f lt 1-3 ss1-3 c in1-3 22f 6 c in4 10f 0.1f 10f 3797 ta05 10nf 4.7k intv cc 200k18.7k 17.3k 10k isp1-3 en/uvlo d1-d3: on semiconductor mbrb2515l l1-l3: wrth 7443310470 led1-led3: luminus pt39 l pwr : coiltronics sd25-470 m1, m3, m5: vishay siliconix si4174dy m2, m4, m6: infineon bsc130p03ls q1: diodes inc. fmmtl718 r t1 : murata ncp15xh103j03rc v in isn1-3 tg1-3 gate1 sensep1 sensen1 0.01 0.01 c out1 22f 2 c out2 22f 2 c out3 22f 2 m4m3 m1 d1 0.1f 0.1f 0.1f v in C15v to C9v v in v in v in v in v in v in intv cc v in v in v ref l1 4.7h l24.7h gate2 sensep2 sensen2 lt3797 gate3 sensep3 sensen3 isn2 isp2 0.05 0.05 0.01 5a m6m5 tg3 tg2 isn3 led3 blue led2green d3 l3 4.7h isp3 fbh3 20k 75k fbh2 20k 75k 0.05 5a 5a m2 tg1 isn1 led1 red isp1 fbh1 20k 34k d2 q1 pwmin1-3 v in (v) C15 70 efficiency (%) 75 80 85 90 100 C14 C13 C12 C11 3797 ta05b C10 C9 95 pwmin1-3 = 5v pwm 5v/div i l1 5a/div i led 5a/div 5s/div v in = C12v 3797 ta05c downloaded from: http:///
lt3797 33 3797f for more information www.linear.com/lt3797 typical applications wide input range, triple buck-boost led driver 1000:1 pwm dimming at 120hz efficiency and output current vs v in ovlo ctrl1-3 v ref rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 r t 35.7k400khz 0.1f l pwr 47h pwm1-3 f lt 1-3 ss1-3 4.7f 3 1f 1f 0.1f 0.25 isp1 4.7f 0.1f 10f 3797 ta06 10nf 2k 47.5k 0.015 m1 49.9k 75k 357k v in 2.5v to 40v (60v transient, 41v internal ovlo protection) isp1-3 en/uvlo d1-d3: diodes inc. pds5100 l1-l3: coiltronics hc9-220r l pwr : coiltronics sd25-470 m1, m3, m5: infineon bsc160n10ns3g m2, m4, m6: vishay siliconix si4401bdy v in v in isn1-3 tg1-3 0.1f 0.1f isn1 tg1 gate1 sensep1 sensen1 1a24v 1a24v 1a24v m2 24.9k 562k l1 22h fbh1 d1 gate2 sensep2 sensen2 lt3797 gate3 sensep3 sensen3 1f 0.25 isp2 4.7f 0.015 m3 isn2 tg2 m4 24.9k 562k l2 22h fbh2 d2 1f 0.25 isp3 4.7f 0.015 m5 isn3 tg3 m6 24.9k 562k l3 22h fbh3 d3 v in (v) 0 efficiency (%) output current (a) 80 90 100 15 25 40 3797 ta06b 70 60 50 1.4 1.8 2.2 1.0 0.6 0.2 5 10 20 30 35 pwm1-3 = 2v output current efficiency pwm 5v/div i l1 1a/div i led 1a/div 2s/div v in = 24v 3797 ta06c downloaded from: http:///
lt3797 34 3797f for more information www.linear.com/lt3797 typical applications triple sepic led driver 1000:1 pwm dimming at 120hz efficiency and output current vs v in ovlo ctrl1-3 v ref rt sync sw1 boost intv cc gnd vc1-3 fbh1-3 sw2 r t 35.7k400khz 0.1f l pwr 47h pwm1-3 f lt 1-3 ss1-3 c in1-3 4.7f 3 c in4 1f 0.1f 10f 3797 ta07 10nf 2k 562k 24.9k 47.5k 0.015 m1 l1a 49.9k 487k 75k v in 2.5v to 40v (60v transient, 41v internal ovlo protection) isp1-3 en/uvlo d1-d3: on semiconductor mbrs3100 l1-l3: wrth elektronik 748870220 l pwr : coiltronics sd25-470 m1, m3, m5: infineon bsc160n10ns3g m2, m4, m6: vishay siliconix si4401bdy v in v in isn1-3 gate1 tg1 sensep1 sensen1 d1 lt3797 m2 l1b c out1 4.7f 2 c out2 4.7f 2 c out3 4.7f 2 c dc1 4.7f 50v c dc2 4.7f 50v c dc3 4.7f 50v ? ? 0.25 0.015 m3 l2a gate2 tg2 sensep2 sensen2 d2 m4 l2b ? ? 0.015 m5 l3a gate1 tg1 sensep1 sensen1 d3 1a24v m6 isn3 1a24v 0.1f 1a24v isp3 l3b ? ? 0.25 isn2 isp2 0.25 isn1 isp1 0.1f 0.1f v in (v) 0 efficiency (%) output current (a) 80 90 40 3797 ta07b 7060 10 20 30 5 15 25 35 100 75 8565 95 1.00 1.500.50 0 2.000.75 1.250.25 1.75 pwm1-3 = 2v output current efficiency pwm 5v/div i l1a+ i l1b 2a/div i led 1a/div 2s/div v in = 24v 3797 ta07c downloaded from: http:///
lt3797 35 3797f for more information www.linear.com/lt3797 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.20mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark(see note 6) pin 1 notch r = 0.30 typ or 0.35 45 c chamfer 0.40 0.10 52 41 114 27 14 12 11 10 9 8 7 6 5 4 3 2 1 40 40 414243444546474849505152 3837 36 35 33 32 31 30 28 27 15 26 2625242322212019 171615 bottom viewexposed pad top view side view 6.50 ref 8.00 0.10 5.50 ref 0.75 0.05 0.75 0.05 r = 0.115 typ r = 0.10 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 C 0.05 5.70 0.10 4.70 0.10 0.00 C 0.05 (ukg52(47)) qfn rev ? 0410 5.50 ref 52 41 4027 26 15 14 1 4.70 0.05 5.70 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 6.10 0.05 7.50 0.05 6.50 ref 7.10 0.05 8.50 0.05 0.25 0.05 0.50 bsc package outline ukg package variation ukg52(47) 52-lead plastic qfn (7mm 8mm) (reference ltc dwg # 05-08-1874 rev ?) package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. downloaded from: http:///
lt3797 36 3797f for more information www.linear.com/lt3797 ? linear technology corporation 2013 lt 1113 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt3797 related parts typical application part number description comments lt3476 quad output 1.5a, 2mhz high current led driver with 1000:1 dimming v in : 2.8v to 16v, v out(max) = 36v, pwm dimming =1000:1, i sd < 10a, 5mm 7mm qfn-10 package lt3492 60v, 2.1mhz 3-channel (i led = 600ma) full-featured led driver v in : 3v to 30v (40v max ), v out(max) = 45v, pwm dimming = 3000:1, i sd < 1a, 4mm 5mm qfn-28 and tssop package lt3496 45v, 2.1mhz 3-channel (i led = 750ma) full-featured led driver v in : 3v to 30v (40v max ), v out(max) = 45v, pwm dimming = 3000:1, i sd < 1a, 4mm 5mm qfn-28 and tssop package lt3795 110v led controller with spread spectrum frequency modulation v in : 4.5v to 110v, v out(max) = 110v, i sd < 10a, tssop-28e package lt3595 45v, 2mhz 16-channel full-featured led driver v in : 4.5v to 55v, v out(max) = 45v pwm dimming = 5000:1, i sd < 1a, 5mm 9mm qfn-56 package lt3596 60v step-down led driver v in : 6v to 60v, pwm dimming = 10000:1, i sd < 1a, 5mm 8mm qfn-52 package lt3598 44v , 1.5a, 2.5mhz boost 6-channel led driver v in : 3v to 30v (40v max ), v out(max) = 44v, pwm dimming = 1000:1, i sd < 1a, 4mm 4mm qfn-24 package lt3599 2a boost converter with internal 4-string 150ma led ballaster v in : 3v to 30v, v out(max) = 44v, pwm dimming = 1000:1, i sd < 1a, 5mm 5mm qfn-32 and tssop-28 packages lt3754 16-channel 50ma led driver with 60v boost controller and pwm dimming v in : 6v to 40v, v out(max) = 45v, pwm dimming = 3000:1, i sd < 1a, 5mm 5mm qfn-32 package dual buck mode led driver with a boost pre-regulator ctrl2-3 ovlo v ref 357k 75k v in rt sync sw1 boost intv cc gnd vc1-3 fbh2-3 sw2 35.7k400khz 0.1f l447h pwm2-3 f lt 1-3 ss1-3 c out1 4.7f50v 4 c out2 4.7f 50v 2 v out1 regulated at 20v when v in < 20v follows v in when v in > 20v c in4 1f 0.1f 10f 3797 ta08 10nf 4.7k 49.9k49.9k isp2-3 en/uvlo v in isn2-3 tg1-3 gate1 sensep1 sensen1 gate2 sensep2 sensen2 isp1 isn1 lt3797 gate3 sensep3 sensen3 0.25 0.068 0.068 1a 16v 1a16v c out3 4.7f 50v 2 m5 m3 0.25 d1 l1 10h m4 m2 m1 tg3 tg2 fbh3 20k 274k fbh2 fbh1 274k 20k isn3 led1+ d3 d2 l3 22h l222h 20k isp3 isn2 isp2 0.012 pwm1 v ref ctrl1 c in 4.7f50v 2 v in 2.5v to 40v (60v transient, 41v internal ovlo protection) 301k tg1 n/c 0.1f 0.1f 0.1f d1: vishay siliconix 12cwq06fn d2, d3: vishay siliconix 30bq060 l1: coiltronics hc9-100 l2, l3: wurth 74437349220 l4: coiltronics sd25-470 m1: infineon bsc110n06ns3-g m2, m4: vishay siliconix si4850ey m3, m5: vishay siliconix si7415dn v in (v) 0 60 efficiency (%) output current (a) 70 80 90 100 0.2 0.6 1.0 1.4 1.8 5 10 15 20 3797 ta08b 25 30 35 40 pwm1-3 = 2v output current efficiency efficiency and output current vs v in downloaded from: http:///

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